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WIP: Remove hardcoded RENDER_QUANTUM_SIZE from Allocator #279

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@orottier orottier commented Jun 1, 2023

A next step for #217, this PR is just to measure performance impact. No need to merge

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github-actions bot commented Jun 1, 2023

Benchmark result:


bench_ctor
  Instructions:             5614171 (+6.454060%)
  L1 Accesses:              8465554 (+7.751120%)
  L2 Accesses:                54156 (+0.060972%)
  RAM Accesses:               61621 (+0.029219%)
  Estimated Cycles:        10893069 (+5.929691%)

bench_sine
  Instructions:            80186716 (+1.861074%)
  L1 Accesses:            117766423 (+1.608867%)
  L2 Accesses:               272930 (-6.398112%)
  RAM Accesses:               62731 (+0.074979%)
  Estimated Cycles:       121326658 (+1.483075%)

bench_sine_gain
  Instructions:            85623430 (+2.214898%)
  L1 Accesses:            126016362 (+2.031638%)
  L2 Accesses:               324573 (+1.507731%)
  RAM Accesses:               62904 (+0.108218%)
  Estimated Cycles:       129840867 (+1.991830%)

bench_sine_gain_delay
  Instructions:           166730759 (+5.357427%)
  L1 Accesses:            236731961 (+5.150387%)
  L2 Accesses:               935875 (+18.04352%)
  RAM Accesses:               65130 (+0.945443%)
  Estimated Cycles:       243690886 (+5.330256%)

bench_buffer_src
  Instructions:            19685926 (+2.884019%)
  L1 Accesses:             29078471 (+3.427721%)
  L2 Accesses:                92774 (-1.519028%)
  RAM Accesses:               96149 (+0.030171%)
  Estimated Cycles:        32907556 (+2.997045%)

bench_buffer_src_delay
  Instructions:            99911053 (+7.703182%)
  L1 Accesses:            138859685 (+7.776522%)
  L2 Accesses:               254878 (+18.44654%)
  RAM Accesses:               96338 (+0.026996%)
  Estimated Cycles:       143505905 (+7.666662%)

bench_buffer_src_iir
  Instructions:            52447211 (+2.015365%)
  L1 Accesses:             73625946 (+2.645466%)
  L2 Accesses:                96848 (-2.991937%)
  RAM Accesses:               96247 (+0.033259%)
  Estimated Cycles:        77478831 (+2.491875%)

bench_buffer_src_biquad
  Instructions:            41152934 (+2.315601%)
  L1 Accesses:             58705623 (+2.751481%)
  L2 Accesses:               181671 (+3.831580%)
  RAM Accesses:               96357 (+0.032182%)
  Estimated Cycles:        62986473 (+2.617512%)

bench_stereo_positional
  Instructions:            50482356 (+3.346700%)
  L1 Accesses:             75372304 (+3.516882%)
  L2 Accesses:               829334 (+12.18723%)
  RAM Accesses:               96510 (+0.033168%)
  Estimated Cycles:        82896824 (+3.770796%)

bench_stereo_panning_automation
  Instructions:            34403500 (+2.914730%)
  L1 Accesses:             51852719 (+3.491887%)
  L2 Accesses:               146773 (-18.76633%)
  RAM Accesses:               96267 (+0.027016%)
  Estimated Cycles:        55955929 (+2.907440%)

bench_analyser_node
  Instructions:            41665999 (+4.492815%)
  L1 Accesses:             58905883 (+4.868003%)
  L2 Accesses:               199141 (-8.320788%)
  RAM Accesses:               96829 (+0.020659%)
  Estimated Cycles:        63290603 (+4.360988%)


Repository owner deleted a comment from github-actions bot Jun 2, 2023
@orottier
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orottier commented Nov 1, 2023

/bench

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github-actions bot commented Nov 1, 2023

Benchmark result:


bench_ctor
  Instructions:             4740256 (+6.910078%)
  L1 Accesses:              7261050 (+7.929148%)
  L2 Accesses:                54212 (+0.051676%)
  RAM Accesses:               61522 (+0.024387%)
  Estimated Cycles:         9685380 (+5.836423%)

bench_sine
  Instructions:            70741223 (+0.750605%)
  L1 Accesses:            103686903 (+1.343105%)
  L2 Accesses:               265008 (+0.954659%)
  RAM Accesses:               62403 (+0.085004%)
  Estimated Cycles:       107196048 (+1.312338%)

bench_sine_gain
  Instructions:            75883417 (+1.391380%)
  L1 Accesses:            111690887 (+2.037792%)
  L2 Accesses:               294854 (+3.301323%)
  RAM Accesses:               62519 (+0.116901%)
  Estimated Cycles:       115353322 (+2.016610%)

bench_sine_gain_delay
  Instructions:           156326218 (+5.403661%)
  L1 Accesses:            220392684 (+5.695748%)
  L2 Accesses:               672890 (+18.91331%)
  RAM Accesses:               64696 (+1.035404%)
  Estimated Cycles:       226021494 (+5.821937%)

bench_buffer_src
  Instructions:            17339933 (+3.379053%)
  L1 Accesses:             25666030 (+3.912361%)
  L2 Accesses:                88155 (+0.277553%)
  RAM Accesses:              100541 (+0.013927%)
  Estimated Cycles:        29625740 (+3.377980%)

bench_buffer_src_delay
  Instructions:            96237609 (+8.185355%)
  L1 Accesses:            132245269 (+8.383800%)
  L2 Accesses:               188595 (+14.37417%)
  RAM Accesses:              100714 (+0.038739%)
  Estimated Cycles:       136713234 (+8.190185%)

bench_buffer_src_iir
  Instructions:            40521443 (-0.482559%)
  L1 Accesses:             60010018 (+0.579327%)
  L2 Accesses:                92215 (+3.898372%)
  RAM Accesses:              100641 (+0.017889%)
  Estimated Cycles:        63993528 (+0.571401%)

bench_buffer_src_biquad
  Instructions:            37062331 (+2.902401%)
  L1 Accesses:             52880145 (+3.403770%)
  L2 Accesses:               119258 (+0.854137%)
  RAM Accesses:              100769 (+0.056597%)
  Estimated Cycles:        57003350 (+3.162962%)

bench_stereo_positional
  Instructions:            43939601 (+5.223627%)
  L1 Accesses:             67076860 (+5.407436%)
  L2 Accesses:               364331 (+27.66388%)
  RAM Accesses:              100861 (+0.016858%)
  Estimated Cycles:        72428650 (+5.593052%)

bench_stereo_panning_automation
  Instructions:            32088473 (+3.730996%)
  L1 Accesses:             48731175 (+4.206341%)
  L2 Accesses:               140984 (+5.268502%)
  RAM Accesses:              100652 (+0.015899%)
  Estimated Cycles:        52958915 (+3.930641%)

bench_analyser_node
  Instructions:            40472395 (+4.591702%)
  L1 Accesses:             57436618 (+5.353693%)
  L2 Accesses:               184155 (-1.731590%)
  RAM Accesses:              101167 (+0.002965%)
  Estimated Cycles:        61898238 (+4.920027%)

bench_hrtf_panners
  Instructions:          1780034119 (+0.294752%)
  L1 Accesses:           2558886115 (+0.389800%)
  L2 Accesses:             26421489 (-0.019635%)
  RAM Accesses:              175532 (+0.274204%)
  Estimated Cycles:      2697137180 (+0.369404%)


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